If both of the A and B inputs are low, then neither of the NMOS transistors will conduct, while both of the PMOS transistors will conduct, establishing a conductive path between the output and Vdd (voltage source), bringing the output high.
In CMOS logic, if both of the A and B inputs are high, then both the NMOS transistors (bottom half of the diagram) will conduct, neither of the PMOS transistors (top half) will conduct, and a conductive path will be established between the output and Vss (ground), bringing the output low. A similar case applies to the NOR function, and this is referred to as NOR logic. Sheffer in 1913 in the Transactions of the American Mathematical Society (Sheffer 1913). The mathematical proof for this was published by Henry M. In the field of digital electronic circuits, this implies that it is possible to implement any Boolean function using just NAND gates. For example, the function NOT(x) may be equivalently expressed as NAND(x,x). This means that any Boolean expression can be re-expressed by an equivalent expression utilizing only NAND operations. The NAND Boolean function has the property of functional completeness.
Please help improve this article by introducing citations to additional sources. Relevant discussion may be found on the talk page. This article relies largely or entirely on a single source.
0 kommentar(er)
